PCI Express Technology

Formerly known as 3GIO, PCI Express is the open standards- based successor to PCI and its variants for server- and client-system I/O interconnects. Unlike PCI and PCI-X, which are based on 32- and 64-bit parallel buses, PCI Express uses high-speed serial link technology similar to that found in Gigabit1 Ethernet, Serial ATA (SATA), and Serial-Attached SCSI (SAS). PCI Express reflects an industry trend to replace legacy shared parallel buses with high-speed point-to-point serial buses.

The new bus technology is expected to allow the PCI Express transmission rates to keep pace with processor and I/O advances for the next 10 years or more. Systems with PCI Express will begin appearing around the middle of 2004.

PCI Express has the following advantages over PCI:

Serial technology providing scalable performance.
High bandwidth—Initially, 5-80 gigabits per second (Gbps) peak theoretical bandwidth, depending on the implementation.
Point-to-point link dedicated to each device, instead of the PCI shared bus.
Opportunities for lower latency (or delay) in server architectures, because PCI Express provides a more direct connection to the chip set Northbridge (see Note 2) than PCI-X.
Small connectors and, in many cases, easier implementation for system designers.
Advanced features—Quality of service (QoS) via isochronous channels for guaranteed bandwidth delivery when required, advanced power management, and native hot plug/hot swap support.

PCI Express will replace the PCI, PCI-X, and AGP parallel buses gradually over the next decade. It will initially replace buses that need the additional performance or features. For instance, PCI Express will initially be deployed as a replacement for the AGP8X graphics bus in client systems, providing high bandwidth and support for multimedia traffic. It will also coexist with and ultimately replace the PCI-X bus in server systems.

In this white paper, we begin with a review of the PCI bus and its variants (PCI-X and AGP) in client and server systems. The paper continues with a discussion of PCI Express technology, including its strengths, advanced features, and form factors. We conclude with its impact on computer system architectures.

PCI Express Technology - Dell [2004]
http://www.dell.com/content/topics/global.aspx/vectors/en/2004_pciexpress?c=us&l=en&s=corp


PCI Express Basics
These are the most common PCI Express slots: the large one incorporates 16 lanes, while the small one is a single lane connector for simple expansion cards.

Unlike PCI and PCI-X, PCI Express is based on a serial protocol. This means that the interface can get by with a very limited number of wires. In exchange, these are clocked much faster than the parallel busses in order to obtain a high bandwidth. Additionally, that bandwidth can be easily multiplied by merging several PCI Express lanes. The specification provides for five different slot types: x16, x8, x4, x2 and x1, where the "x" is pronounced as "by"; for example, the widest PCIe variant is called "by sixteen".